Introductory to Boundary Scan Workshop

XJTAG will host a free workshop. The event will explain how boundary scan testing can help board designers and engineers. The boundary scan workshop is designed to provide design, development, test, and production engineers with a practical hands-on introduction to boundary scan. Engineers will learn how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The Introductory to Boundary Scan workshop will take place Wednesday, February 29, 2012 at XJTAG’s Cambridge headquarters.

During the full-day session, XJTAG’s trainers will explain how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The free workshop will give an overview of the IEEE 1149.x standard, demonstrate how to communicate with the JTAG chain and interact with JTAG devices such as FPGAs. The event will provide an introduction to board testing using the JTAG chain, explain how to describe a circuit to enable JTAG testing and how to run an infrastructure connection test. In addition, the trainers will outline how to test non-JTAG elements of a board design using boundary scan.

Introductory to Boundary Scan Workshop Topics

  • Overview of the IEEE 1149.x standards
  • How to communicate with the JTAG chain
  • Tools to interact with JTAG devices, such as FPGAs or BGAs
  • Introduction to board testing using the JTAG chain
  • How to describe a circuit in order to enable JTAG testing
  • Fault finding abilities of a JTAG connection test
  • How to test non-JTAG elements of a board design using boundary scan

More info: XJTAG Boundary Scan Workshop