Analog Devices will host a webinar about the fundamentals of clocks synthesis and distribution. The online seminar will discuss the types of phase-locked loops, the key features of these devices, and the applications they are designed for. The ADI webcast will take place tomorrow (January 18, 2012) at 12:00 pm EST. The webinar is ideal for students and engineers who are new to the field, and also for more experienced engineers looking for a refresher on this or any other part of the signal chain, design, and layout.
The Fundamentals Of Clock Synthesis and Distribution webcast covers the fundamentals of clock synthesis and distribution. The online seminar covers the various types of phase-locked loops (PLLs), the key features of these devices, and which end market they are designed for. Concepts such as reference switchover, holdover, phase noise, jitter, output drivers, and signal integrity will be covered.
The webcast will be presented by Paul Kern. He is a Clock Applications Engineer with Analog Devices’ Linear and Radio Frequency Group, located in Greensboro, NC. Kern graduated with a BSEE and MSEE from Santa Clara University in 1990 and 1992, respectively, with a specialty in microwave circuits and digital magnetic recording. He has over 5 years experience in data storage, and over 15 years of experience in applications engineering and high speed digital circuits.