2011 Nanometer Circuit Verification Forum

The 2011 Nanometer Circuit Verification Forum will take place on September 22, 2011 in Santa Clara, California. The nanometer forum will present successful approaches to verifying analog, mixed-signal, and RF circuits implemented in 90nm to 28nm silicon. The all-day event is free, but registration is required. The Nanometer Circuit Verification Forum is hosted by Berkeley Design Automation. Other EDA companies supporting the event include Accelicon Technologies, Ciranova, Invarian, MunEDA, and Solido Design Automation.

The Nanometer Circuit Verification Forum is a technical event highlighting nanometer circuit verification challenges in detail, and describing leading-edge solutions and their application to advanced circuits. The forum will feature leading-edge designers, university programs, and emerging EDA companies sharing successful approaches to verifying analog, mixed-signal, and RF circuits employed in 90nm to 28nm silicon.

Nanometer Circuit Verification Forum Topics

  • Application examples
    • Data converters
    • PLLs and timing circuits
    • High-Speed I/O
    • Image sensors
  • Emerging verification technologies
    • Nanometer device modeling
    • Rapid prototyping including parasitic effects
    • Thermal-aware circuit verification
    • Variation-aware circuit design
    • Circuit optimization and analysis

More info: Nanometer Circuit Verification Forum Registration