Cadence Design Systems introduced the Cadence System Development Suite for app-driven electronics. The Cadence System Development Suite features four connected platforms: Cadence Palladium XP Verification Computing Platform, Cadence Incisive Verification Platform, Cadence Rapid Prototyping Platform, and the Cadence Virtual System Platform. The four connected platforms enable hardware-software co-design from architectural-level development through to prototyping. The first three platforms are available now. The Cadence Virtual System Platform will be available later this year.
Cadence System Development Suite Highlights
- Can reduce system integration time by up to half for next-generation designs
- Spans the entire design cycle, from early architectural-level software development through testbench simulation and system validation to prototyping
- Integrated flow with a common environment
- Enables system engineers to migrate quickly from one development phase to another
- Supports industry-standard languages and protocols, third-party tools, and multiple levels of design abstraction
- Enables fast and easy migration among the four platforms, from task to task, and between HW/SW domains
- Scalable — delivers sufficient performance, capacity, and embedded software volume distribution as needs fluctuate
Cadence System Development Suite Connected Platforms
- Cadence Rapid Prototyping Platform
This new FPGA-based prototyping solution combines high-capacity FPGA boards with a complete implementation and debug software flow. It is ideal for exhaustive regression tests and cycle-accurate software development. The platform speeds bring-up time, automates multi-FPGA partitioning, and includes debug capability.
- Cadence Virtual System Platform
New solution for early software development at the architectural and prototype design phases. It provides an integrated HW/SW debug environment with multi-core capabilities, it is connected to the RTL verification flow, and it automates and accelerates the creation of new transaction-level models (TLMs). It is ideal for pre-RTL, architectural-level software development, and can also be used in a post-RTL mode to generate virtual prototypes that provide an alternative to reference boards.
- Cadence Palladium XP Verification Computing Platform
Performs advanced simulation acceleration and emulation in a single environment, with hot-swap capability for instant migration among tasks. It is ideal for long regression tests and system validation. The platform enables in-circuit emulation, performs HW/SW co-verification, and offers flexible support for hard/soft IP. It also supports dynamic power analysis, low-power verification, and transaction-based acceleration for a Universal Verification Methodology (UVM)-based flow.
- Cadence Incisive Verification Platform
A family of tools optimized for block- and chip-level verification with testbench simulation as a focal point. It includes technologies for metric-driven verification planning and management, verification IP creation and reuse, mixed-signal simulation, and formal analysis. Incisive Software Extensions enable software driver verification and the SimVision debug user interface is used by all other Platforms in the Suite.
More info: Cadence Design Systems