Synopsys Proteus LRC for Lithography Verification

Synopsys announced Proteus LRC (lithography rule check) for lithography verification. Proteus LRC is a post-optical proximity correction (OPC) verification tool. It enables fast and accurate hotspot detection across the process window for full-chip mask validation within the highly-scalable Proteus Pipeline Technology. Synopsys Proteus LRC is designed for 28-nanometer (nm) and below. It features OPC models and rigorous first-principle models from embedded Sentaurus Lithography technology. Proteus LRC is integrated into the Proteus Mask Synthesis flow.

Synopsys Proteus LRC (lithography rule check) for lithography verification

Synopsys Proteus LRC Features

  • All checks employ process window-aware algorithms for optimal performance and consolidated data analysis
  • Identifies the worst error across the process window for any location in a design
  • Error detection for each exposure and mask misalignment condition with a consolidated results viewing environment
  • DPT-specific check functions are optimized for the unique process errors encountered in a multi-mask lithography process
  • Robust checking, easy implementation, and consolidated results viewing
  • Embedded Sentaurus Lithography technology provides easy access to resist profiles and topography effects through rigorous first principle models
  • Integrated into the Proteus Mask Synthesis flow
  • Standardized platform between OPC and Proteus LRC provides a consistent syntax for easy transitioning between tools
  • Fully programmable interface for flexibility
  • Enables engineers to incorporate their own check functions and algorithms to protect IP
  • Proteus Pipeline Technology
  • Errors are grouped across the process window and based on context for more compact/efficient error reviewing
  • Full-chip statistical analysis of all parameters checked
  • Data handoff to wafer and mask inspection tools
  • Problem areas are quickly identified

More info: Synopsys