JTAG ProVision Boundary Scan Enhancements

JTAG Technologies increased the performance of their ProVision suite of boundary-scan development tools with the addition of eleven enhancements. The new enhancements are all available on CD17, which also includes the ProVision Designer Station (PV_DST). Support for additional microprocessors with embedded flash and a new Production Integration Package (PIP) for supporting .NET (for interfacing with Microsoft applications) has been added to the range of existing PIP packages.

ProVision Boundary-scan Enhancements

  • Addition of all instructions handling (including private instructions) within ProVision’s JTAG Functional Test (JFT) capability
  • Addition of ‘netlist type autodetect, which automatically recognizes netlist formats as belonging to their respective tool vendors
  • WGL test vector format (as used for IC testing) is now supported through a ProVision plug-in
  • Ability to test (IEEE) 1149 dot 6 to dot 1 connections
  • Support for FTDI USB to serial port peripheral devices (embedded on target board)
  • HTML reporting for TTR and BSD in AEX sequences
  • Ability to export and re-import AEX sequences
  • Support for double-latching bus logic
  • Boundary-scan register length check
  • Support for multiple ID codes in BSDL
  • 64-bit drivers for DataBlaster hardware

More information: JTAG Technologies