Cadence Design Systems recently published a white paper on their new Silicon Realization approach. The technical paper explains how Silicon Realization is a fundamentally new approach to semiconductor design, verification, and implementation. Silicon Realization extends traditional EDA to cover both integration and creation. It unites functional, physical, and electrical concerns. It is also based on three emerging concepts: unified intent, higher abstraction levels, and convergence.
Silicon Realization – A New Approach to Faster, Better, and More Profitable Silicon
While Silicon Realization encompasses most of what the industry has defined as traditional “EDA,” it goes far beyond this definition by outlining a deterministic path to silicon that is broader, more efficient, and more effective than today’s point-tool based approaches. In its fullness, Silicon Realization addresses the business and technology challenges of complex silicon development, and enables design, implementation, and verification teams to attain higher levels of productivity, predictability, and profitability.
In contrast to traditional EDA, Silicon Realization is not solely about solving a place-and-route problem, or building a more efficient op amp, or getting a tool to run 1.3x faster — it’s all of that and more. Silicon Realization is about solving the overall silicon design problem and bringing together everything that’s needed to produce complex silicon or IP.
These days, Silicon Realization nearly always involves both analog and digital design, requiring a fully integrated mixed-signal design, verification, and implementation flow. Further, most silicon designs have aggressive power, performance, and form factor requirements in order to provide differentiated functionality for the end user. These demands often require advanced process nodes, where integrated circuits (ICs) sometimes exceed a billion transistors or more.
More information: Frost & Sullivan (pdf)