Jasper DFI Formal Verification Proof Kits for DDR-PHY Specification

Jasper Design Automation rolled out Proof Kits for the DFI (DDR-PHY) specification. The new DFI Proof Kits are currently available and provided at no additional charge to current licensees of Formal Testplanner. Other Jasper Proof Kits include AMBA 4 with AMBA 4 AXI, AXI-Stream and AXI-Lite interfaces; LPDDR1, LPDDR2, DDR, DDR2 and DDR3 SDRAM; AHB and AHB Lite; APB; Ethernet MDIO; OCP-IP; and PCI-Express.

Jasper’s DFI Proof Kits are sets of properties, written in SystemVerilog, for verification of standard interface protocols. Each Proof Kit includes a Formal Testplan providing detailed instructions on verifying DFI designs, plus properties for the protocol that the JasperGold Verification System can prove against designs employing the specification. DFI solutions are widely used for cell phones, high-performance graphics, and other memory-intensive applications.

DFI (DDR-PHY) specification is an interface protocol between memory controller logic and PHY interfaces that reduces integration costs while enabling performance and data throughput efficiency. Jasper Design Automation’s high-performance, high-capacity formal verification is a complete solution for dealing with the complex protocols and timing parameters specified by DFI.

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