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Design and Verification Conference 2010

Posted by Ken Cheung in Events, Training on Thursday, February 18, 2010

DVCon (Design and Verification Conference) will take place Monday, February 22 through Thursday, February 25 at the DoubleTree Hotel in San Jose, California. The event is ideal for engineers that work on the design and verification of electronic systems. DVCon consists of technical program, panels, sessions and educational presentations. It is sponsored by Accellera.

Exhibits will be open Tuesday and Wednesday from 2:00pm – 6:30pm. The keynote, “Breaking through the Efficiency Barrier,” will be presented by Lip-Bu Tan, president and CEO of Cadence Design Systems, on Wednesday in the Oak/Fir Ballroom at 2:00pm. The new industry leader’s panel, “What Keeps You up at Night” will be held Wednesday following the keynote. Another new panel, “Ever-onward! Minimizing Verification Time and Effort,” will be held on Thursday in the Donner/Siskiyou Ballroom at 3:30pm.

There are also a couple of co-located events: The first, “So you want to start up an EDA company? Here’s how..” is hosted by angel investor Jim Hogan and start up executive Paul McLellan and will be held on Tuesday in the Oak Ballroom from 6:30-7:30pm. The second event, a SystemC Day, will be held Monday beginning at 8:30am in the Oak Ballroom.

More info: DVCon

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