Averant introduced Solidify 5.2. The latest version of Solidify features accelerated analysis with multi-core computers, new Auto Check technology, and enhanced sequential equivalency checking (SEC). Release 5.2 is available immediately. Averant is a leader in property verification of RTL designs for digital integrated circuits.
Averant Solidify 5.2 Features
- Multi-Core Acceleration
In Release 5.2 Solidify delivers an improved accelerated analysis using multi-core computers. With an 8-core workstation designers can experience up to 7X faster verification performance.
- New Auto Check Technology
Averant’s leading auto checks are used by design teams to catch bugs, including dead code, deadlock, array boundary violation, signal contention, clock domain crossing, and reset propagation. Release 5.2 employs new native software technology for improved run-time, scalability and robustness.
- Enhanced Support for SEC
SEC is a key step in reducing power consumption of digital circuits after a design’s functional goals are achieved. Introduced in the previous release and built on Averant’s First In Formal property verification technology, Release 5.2 delivers easier read-in of designs, improved setup of initial states, and enhanced performance and robustness.
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