EDA Blog - electronic design automation, embedded systems, ic

Share/BookmarkSubscribe

Silicon on Sapphire Process Design Kits

Posted by Ken Cheung in EDA Tools on Tuesday, February 9, 2010

Sapphicon Semiconductor and AWR teamed on process design kits (PDKs) for AWR software that support Sapphicon’s advanced SoS processes. AWR’s Analog Office RFIC design software is used to develop Sapphicon PDKs because of its ability to provide extremely accurate models. AWR/Sapphicon PDKs are available immediately to select, pre-qualified joint customers.

Sapphicon presently offers AWR PDKs for all variants of its 0.25-µm process and is currently working on PDKs covering its 0.5-µm high- frequency RF/mixed signal complementary metal oxide semiconductor (CMOS) processes.

SoS is an ideal process for high-frequency and mixed-signal devices as its insulating substrate eliminates parasitic capacitance from the circuit, which enables higher frequencies, low power consumption, and high Q passives (e.g., inductor QL greater than 40 at 2 GHz) to be achieved. Transistors created using SoS technology also have much lower junction capacitance and thus have fewer non-linearities at high frequencies than those manufactured with standard CMOS processes.

More information: AWR | Sapphicon Semiconductor

Related Posts with Thumbnails
 
EDA Blog Newsletter
Don't have time to visit EDA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.