SLASH Combines SLED Schematic Editor and SMASH mixed Signal Simulator

SLASH, from Dolphin Integration, bundles the SLED schematic link editor with the SMASH mixed signal simulator. SLASH natively supports Property Specification Language (PSL) assertions to empower designers for performing Assertion-Based Verification (ABV). PSL is a language based on the Sugar language which originated at IBM Haifa. It has been IEEE standardized as PSL in 1995. It aims at specifying design properties through assertions to ensure that a circuit meets its specifications.

The designer or the verification engineer can instantiate PSL assertions in their designs and simulate them for validation purposes with the both SLED and SMASH. In addition, the SLED ABV option enables developers to automatically generate synthesizable hardware checkers that can be embedded in a test chip, an FPGA, a secure circuit, or a mission critical circuit for real-time monitoring. The generated RTL views of PSL properties (in Verilog or VHDL) can be easily integrated into any design environment.

More info: Dolphin Integration