Emerging Technologies in Solid State Devices SEMATECH Workshop

The SEMATECH-led workshop, Emerging Technologies in Solid State Devices, will take place December 5-6, 2009. Technologists, executives, and faculty from across the semiconductor R&D community will present technical data revealing advances in emerging memory technologies, energy efficient devices, and high mobility channel transistors. The SEMATECH workshop will feature over 40 presentations and panel discussions on cutting-edge solutions to the technical and manufacturing challenges associated with emerging nanoelectronics technologies.

Emerging Memory Technologies

  • A number of emerging technologies, such as 3D NAND, phase change memory (PRAM), magnetoresistive memory (MRAM), spin torque transfer memory (STT-RAM), and resistive memory (RRAM), are currently in play, and advancements include:
    • A new understanding in resistive memory, using approaches based either on formation of conducting filaments in resistive materials or on ion transport
    • Embedded STT-RAM for integrated wireless device applications
    • The integration of 3D interconnects and memory technologies to increase memory density
    • The use of band gap engineering for charge trap flash memories and alternatives to conventional DRAMs such as novel single transistor DRAMS
  • The industry has identified at least 34 materials as candidates for RRAM technology. From a manufacturing perspective, SEMATECH encouraged a focus on down-selecting, as feasible, to the dozen “green materials” that have already been accepted into fabs.
  • Guest panelists acknowledged that emerging memory technologies are promising solutions to replace scaling problems associated with current memories, concluding that emerging memories will be application-driven – with different permutations of power, density, speed, and cost – and that there are no universal memory solutions.

High Mobility Channel Transistors

  • Transistors using non-silicon materials such as III-V and germanium (Ge) are showing significant promise in mobility improvement, injection velocity, and voltage scaling as compared to strained silicon
  • III-V materials based on an InGaAs system seem to be the preferred option for N channels, while either Ge or III-V (perhaps a strained antimonide-based system) may be appropriate for P channels
  • While several critical challenges remain – including gate stacks, channels with low defect density, and suitable junction and contact technology – panel members agreed that these are not showstoppers and may be overcome with novel architectures for sub-15nm nodes
  • Additional uses for III-V materials beyond CMOS were discussed, including RF circuits, tunneling field-effect transistors, and nanophotonic devices

Energy Efficient Devices

  • Presentations featured new approaches to blending conventional and low-power electronics with More than Moore concepts, ranging from graphene-based nanomaterials, energy harvesting devices, and self-powered sensors, to NEMS and NEMory (nano-electro-mechanical non-volatile memory) devices and MEMS displays for mobile applications.

More info: SEMATECH