ESD Design for High Speed Interfaces: Critical Design Considerations

NXP Semiconductors is offering a webinar, ESD Design for High Speed Interfaces: Critical Design Considerations, on Tuesday, December 8, 2009 11:00 am EST (8:00 am PST, 16:00 GMT). In the webcast, you will learn about design consideration for choosing ESD protection devices for high speed interface protection. The online seminar will cover comparisons of performance, other available solutions, layout techniques for improving overall performance, and recent advances in protection architectures.

NXP Webinar Topics

  • Comparing ESD performance of various ESD solutions
  • Layout techniques for improving ESD performance
  • Recent advances in ESD protection architectures

Next generation interfaces such as HDMI 1.4, USB 3.0, eSATA and Display Port present serious challenges to system designers trying to provide adequate protection against the threats of ESD. Increasingly dense circuit geometries combined with high speed signal requirements are forcing ic’s to become smaller and faster, and as a result more susceptible to the dangers of ESD strikes. Delivering the levels of circuit protection needed while maintaining superior signal integrity has rendered traditional solutions ineffective.

This webinar is the first of a two part series discussing design considerations for choosing ESD protection devices for high speed interface protection. Part 2 scheduled for January, 2010 will cover design considerations for maintaining signal integrity at high speeds.

More info: ESD Design for High Speed Interfaces: Critical Design Considerations