Application Hardware Modeling for Development of Virtual Components
DOLPHIN Integration announced the Application Hardware Modeling (AHM) for the development of Virtual Components of Silicon IP. AHM aims at optimizing any critical function performed jointly by parts of the system, comprising some Virtual Component within a SoC, its PCB with relevant discrete components, such as Quartz, PMIC, or MEMS, along with application software.
Performing an application hardware simulation enables designers and/or FAEs to anticipate the disruption linked to the integration of components in the system and to check the corrective solutions, be they on the ViC, the SoC or the PCB. It ends-up helping to reduce costs as well as time-to-market of the final application because the right questions finally are raised at the right time.
The mixed-signal simulator SMASH enables AHM simulation because it natively handles multiple description levels with any hardware description languages in a single netlist like Verilog A, etc. In particular, SMASH is known as a reference for its VHDL-AMS compliance and support while EMBLEM libraries supplied by DOLPHIN provide the complement for AHM model assembly whenever multi-domain modeling is required, as with MEMS, etc.
Application Hardware Modeling is ideal for FAE of any Fabless Supplier of IC’s with concerns for:
- Power Regulation
- SNR
- IP evaluation with testchip or simulation
- Data Rates
- Jitter Resilience
- Supply Noise Reduction
- Power Consumption
- Pop-up Noise
More info: SMASH Mixed-Signal Multi-Level and Multi-Domain Simulation
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