eASIC eTools 8.0 Software Suite for 45nm Nextreme-2 Designs

eASIC introduced eTools 8.0 software suite for implementing 45nm Nextreme-2 designs. The eTools 8.0 tool suite delivers a robust ASIC grade design flow with the simplicity, ease of design, and a cost point that is normally associated with FPGA design tools. By focusing on ease-of-use, and low cost of entry, eASIC is now enabling designers to make a seamless transition to adopting Nextreme-2 devices as a lower cost and lower power alternative to FPGAs and a lower NRE alternative to traditional ASICs.

eASIC eTools 8.0 software suite for implementing 45nm Nextreme-2 designs

New eTools 8.0 Features

  • Support for designs up to 1 million logic cells (eCells)
  • Push-button GUI-based tools to help FPGA designers come rapidly up to speed
  • Interactive power consumption estimator based on synthesized netlist
  • SDC timing constraints checking to ensure design is optimally constrained
  • Intuitive floor planning that enables optimal placement of design macros
  • Support for third party synthesis tools Synopsys Design Compiler and Magma Talus
  • Global placement to enable designers to quickly obtain accurate timing information prior to design hand-off

The eTools 8.0 software suite includes a number of new capabilities that simplify the transition path for designers looking to adopt the advantages of Nextreme-2 devices. These include a user friendly GUI-based design environment (Design Navigator), IP-wizards that facilitate easier integration of IP blocks; a new power estimation tool that enables power estimation based on the RTL; and an easy to use floor planning tool for making optimal macro placements. Designers have the option of performing synthesis using Magma Talus RTL or Synopsys DC tools.

Unlike traditional standard cell ASIC flows, the eTools 8.0 flow enables designers to focus their efforts on achieving their desired functionality and timing and not on arduous complex deep submicron ASIC tasks such as power mesh design, signal integrity, test insertion, DFM (design for manufacture) and clock insertion. As a result, designers are able to rapidly progress from their initial RTL to a netlist-level handoff to eASIC. Nextreme-2′s unique and patented single-via based configuration technology enables eASIC engineers to rapidly tape-out and deliver prototypes in 6 to 8 weeks.

More info: eASIC eTools Design Software