Gates-on-the-Fly Netlist Editor with Waveform Viewer Interoperability

SynaptiCAD’s Gates-on-the-Fly (GOF) Verilog netlist editor and incremental schematic viewer now features schematic back annotation and waveform viewer cross-probing. Using one of SynaptiCAD’s waveform viewers, designers can view waveforms from a simulation (e.g. a VCD file) or a logic analyzer and show specific logic states annotated on GOF schematic windows. The schematic and the waveform displays are linked so that engineers can quickly control the simulation time that is displayed from either the schematic or the waveform windows.

Gates-on-the-Fly Netlist Editor with Waveform Viewer Interoperability

Gates-on-the-Fly is available on Windows and Linux. A perpetual license sells for $5000 on Windows (special introductory pricing is available for the next 90 days). Leasing options are also available.

Once a Verilog netlist is loaded into the Gates-on-the-Fly editor, you can select and view partial sections of the netlist as a GofTrace schematic window. Then, when a waveform file has been loaded into SynaptiCAD’s waveform viewer, GOF supports several methods of controlling what waveforms are shown in the waveform window from a schematic window.

Logic states at a specific simulation time can be sent and displayed on the active schematic window by right clicking in the timeline of the waveform viewer. New buttons in GOF also allow moving backwards and forwards in time to the next or previous logic change on the nets shown in the schematic or jumping directly to a user-entered time.

Several of SynaptiCAD’s products (Timing Diagram Pro, WaveFormer Pro, BugHunter Pro, and VeriLogger Extreme) support GOF schematic annotation. If you do not own one of these products, you can download SynaptiCAD’s free WaveViewer software which also supports GOF schematic annotation.

Gates-on-the-Fly (GOF) graphically analyzes and edits large Verilog netlists that have been generated from a synthesis or layout tool. Netlists sometimes require changes to either meet timing closure specifications, fix functional logic bugs, or to repartition a design. Using GOF, you can easily find and view specific logic cones in your design on a schematic to visualize just the paths you need to see without unnecessary clutter. GOF also simplifies mapping from RTL level constructs to their gate-level equivalents, so that you can pinpoint the locations where changes need to be made. GOF’s ECO mode supports both graphical and script-based editing features for tracking ECO changes. Metal-only ECO operations are also supported with an automatic spare gates flow.

More info: SynaptiCAD