The Five Pitfalls of 4G Baseband SoC Design Webinar
Tensilica is offering a webinar on the the five pitfalls of 4G baseband SOC design. The webcast will take place on Tuesday, October 27, 2009 at 11 am PT (2 pm ET). The webinar explores five significant challenges faced by designers of efficient digital basebands, including pitfalls in LTE’s many modes, excessive cost and power, the “million MIPS” hurdle of Turbo decoding, and the dilemma of choosing the right communications among the LTE building blocks. The online seminar uses detailed examples from an end-to-end LTE PHY baseband architecture to highlight the key dos and don’ts.
The Five Pitfalls of 4G Baseband SOC Design webinar is ideal for architects of next-generation SOCs for 4G baseband. Anyone interested in making sure they’ve covered all the bases involved in this complex design should listen to make sure they’re not falling into one of these pitfalls. Dr. Chris Rowen (CTO, Tensilica) is the presenter.
For the first time in memory, the industry is converging on a single wireless standard to cover all high data-rate cellular and wide-area-network needs – LTE. The emerging LTE standard is complex, requires extraordinary computation throughput and much better power efficiency than previous wireless baseband PHY subsystems. Because of the complexity, designers are taking many different approaches to chip design for LTE.
More info: The Five Pitfalls of 4G Baseband SOC Design Webcast
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