Agilent Advanced Design System 2009 Update 1 – Channel Simulator Mode

Agilent’s Advanced Design System (ADS) 2009 Update 1 features a new statistical mode for the signal integrity Channel Simulator. The new statistical mode is ideal for design and verification of high-speed, chip-to-chip data links found in most consumer and enterprise digital products produced today. By accelerating simulation, the new Channel Simulator mode allows manufacturers of such products to more quickly explore and arrive at an optimal design and eliminates the need for costly and time-consuming prototype iterations, dramatically improving time-to-market.

Advanced Design System 2009 Update 1 Features

  • BER contour and bathtub display
  • Equalizer support with automatic tap optimization
  • Eye mask utility with automatic violation checking
  • Ability to check cross-talk with aggressors at different data rates
  • Memory bus compliance tool for the DDR3 standard
  • Emitter-coupled logic models that comply with the IBIS standard
  • Time-domain reflectometry tool
  • New X-Parameter Generator for creating fast, IP-protected nonlinear models
  • Enhanced Integrated 3D EM Analysis — including Finite Element EM sweeps, optimization and co-simulation with circuit analysis
  • Complete MMIC ADS Desktop Flow to Manufacturing — including enhanced PDKs, Desktop LVS and Calibre LVS integration
  • New Optimization Cockpit to interactively monitor, tune and guide optimizations for better results, faster
  • Signal Integrity Channel Simulation and Eye Diagram Statistics

The Agilent ADS 2009 Update 1 will be available this month. The new Channel Simulator mode is a capability found in Agilent’s ADS Transient Convolution Simulator. Signal integrity bundles are available at a starting price of $28,000.

At today’s multigigabit-per-second rates, high-frequency phenomena like impedance mismatch, reflections, crosstalk, skin effect and dielectric loss come into play. Agilent’s Channel Simulator enables designers to perform simulations using circuit-level models that can be verified against measured data and EM simulation of the layout artwork.

More info: Agilent Technologies