2009 Silicon Valley Power Forward Low-Power Design Summit

The second annual Silicon Valley PFI Low-Power Design Summit will take place on October 20, 2009 in San Jose, California. The Power Forward Low-Power Design Summit (8:30 am to 6:00 pm) will be at Cadence Design Systems in Building 10 Auditorium. The member companies of the Power Forward Initiative (PFI) will share their low-power design expertise, best practices, and proven capabilities that can be use to design energy-efficient wireless and wired electronics. The summit is ideal for anyone working on or considering an energy-efficient design project, or those seeking technical expertise, knowledge of ecosystem capabilities, and examples of production-proven low-power methodology in use today.

Power Forward Low-Power Design Summit Highlights

  • Interact with presenters and panelists in sessions focusing on design experiences, low-power IP, and architectural design topics
  • Hear about ecosystem capabilities including advanced solutions that support a holistic low-power design methodology
  • Discuss emerging low-power design techniques and learn about the trends for future power efficient and green technologies

Power Forward Low-Power Design Summit Agenda

  • 8:30: Registration and breakfast
  • 9:00: Welcome and introduction
  • 9:20: PFI members technical presentations by GUC, Si2, ARM, Cadence
  • 11:30: Industry Insight Panel (Panelists: Wipro, Sonics, Cadence, AMD)
  • 12:00: Lunch
  • 1:00: Technical presentations (Parallel tracks) by Calypto, Virage, Freescale, Faraday, Cadence, Virage, Mindtree, Alchip, Sonics, Magma
  • 4:15: Closing remarks/Raffle (Amazon Kindle, PFI Low-Power Guide)
  • 4:30: Networking/drinks/hors d’oeuvres

More info: Power Forward Low-Power Design Summit