Accellera Verification Intellectual Property Recommended Practices

Accellera has approved the Accellera Verification Intellectual Property (VIP) Best Practices Interoperability Guide. The Guide details how to use VIP components developed using SystemVerilog testbench environments based on either the Open Verification Methodology (OVM) or Verification Methodology Manual (VMM) interchangeably to lower verification costs and improve design quality. The document is the result of work of the VIP Technical Subcommittee (TSC), which was formed in May 2008.

The VIP Best Practices Interoperability Guide includes a VIP reference library that can be used as part of a verification interoperability methodology and a chapter devoted to introducing the high-level concepts of interoperability and component integration. It outlines a process that can be used to define a verification environment and select which cross-referenced best-practice sub-chapter or sub-chapters apply to specific integration challenges.

The Accellera’s VIP Interoperability standardization effort makes it easier to reuse verification components and reduces the cost of repurchasing and rewriting IP for each new project or electronic design automation tool.

Accellera’s VIP TSC will continue its efforts to develop a Common Base Class Library (CBCL) and associated verification methodology with the goal of achieving IEEE standardization. Accellera’s VIP Technical Subcommittee is open for participation by everyone, and holds weekly meetings on Wednesdays at 9am PST. Accellera membership offers additional benefits to participants.

More info: Verification Intellectual Property (VIP) Recommended Practices (pdf)