Carbon Design Systems introduced the Carbon Model Library for co-simulation. The library enables register transfer level (RTL) and firmware engineers to simultaneously debug processor integration into complex system-on-chip (SoC) designs, reduce the overall schedule, and establish a foundation for further productivity gains using virtual platforms. Carbon’s co-simulation approach allows for the hardware design to be run through most RTL simulators while the firmware is interactively debugged using software tools such as ARM’s RealView debugger. The Carbon Model Library for Co-Simulation is shipping now. Pricing starts at $25,000.
Each component in the Carbon Model Library for co-simulation has been compiled directly from the corresponding RTL code and retains 100% of the accuracy of the hardware design. All models are integrated with a corresponding software debugger that enables the firmware designer to set breakpoints and observe and/or modify register and memory locations. Co-simulation of the models with RTL code is supported in all leading simulators, including Synopsys VCS, Cadence Incisive Enterprise Simulator and Modelsim from Mentor Graphics. ARM models currently available in the model library include the Cortex A9UP, Cortex A9MP, Cortex A8, Cortex M3, Cortex R4, 1176, 1136, 11MPCore and 926.
The Carbon Model Library for Co-Simulation offers the benefits of virtual platforms to the RTL designer by leveraging the existing RTL infrastructure and avoiding the task of assembling a virtual platform. The designer simply replaces the instantiation of the processor in their simulation environment with the corresponding component from the Carbon Model Library. The model will have the same functionality but can now be debugged interactively using a software debugger instead of waveforms.
More info: Carbon Design Systems