This year, the IP 09 conference will be combined with Embedded Systems Conference to become IP-ESC 2009 (IP-Embedded Systems Conference). The combined event will cover topics from IP to SoC to Embedded System. IP – ESC 2009 will take place December 1-3 in Grenoble, France. The IP-Embedded Systems Conference is ideal for embedded systems engineers. The event brings together system architects, design engineers, suppliers, analysts, and media across the globe. IP-ESC 2009 is a place for the embedded community to congregate, to identify solutions for immediate design challenges, and to meet providers face-to-face, delivering solutions for the current project and the next.
IP – ESC 2009 Keynotes
- Prototyping Using IP at Multiple Abstraction Levels Enables Embedded Software Development
Joachim Kunkel, Vice President and General Manager, Solutions Group, Synopsys
- Strategies For Managing SoC IP Risks at Advanced Process Nodes
Yervant Zorian, Vice President and Chief Scientist, Virage Logic
IP – ESC 2009 Seminars and Track Sessions
- IP Reuse vs. IP Leverage: What’s the difference, and what are the issues?
Holly Stump from Jasper Design Automation, Kathryn Kranen from Jasper Design Automation, Ron Collett from Numetrics, Olivier Haller from STMicroelectronics
- Evolving support from Silicon industry for low volume designs – FPGAs, cost reduction programs, alternatives
Francois Kleitz from Alcatel Lucent
- The evolution of semiconductor business models: is the fabless dead or alive and kicking?
C. Paul Slaby from Kaben Wireless Silicon Inc
- Improving IP Quality vs. Losing Design Productivity – What Are the Tradeoffs?
Michel Tabusse from Satin IP, François Rémond from STMicroelectronics, Kathy Werner from Freescale, Philippe Di Crescenzo from Arteris, Michel Tabusse from Satin IP Technologies
- Design and Reuse – The impossible dream?
Jack Browne from Sonics
- Transactors: where the virtual world meets the implementation world
Laurent Ducousso from ST, Heiko Mauersberger from Synopsys, Antoine Perrin from ST, Stephen Bailey from Mentor, Luc Burgun from EVE, Xavier Buisson from CoWare
- Future in IP interconnects: optical, 3-D, wireless, what are the main challenges?
Fabien CLERMIDY and Daniel VELLOU (CEA/LETI)
- Next massively Parallel computing
Peter Marwedel (Technische Universität Dortmund, Germany)
- TLM Verification for Systems-on-Chip
Bosch, Infineon, Siemens, FZI, Velten, Esen, Ecker (Infineon ), Stefan Lämmermann (University of Tübingen )
- Computational Models for Embedded Software
Huy-Nam Nguyen (Bull S.A.S.)
- IP Management for internal and External IPs
Philippe Ozil and Gabriele Saucier (Design And Reuse)
- Embedded system design powered by European EDA and IP industry
Juergen Haase (edacentrum GmbH)