Paradigm Frees SystemVerilog FrameWorks OVM Template Generator

Paradigm Works made a key software contribution to the chip development community when they donated its SystemVerilog FrameWorks OVM Template Generator for free use through the Open Verification Methodology (OVM) World community website. Functional verification engineers using the OVM for SystemVerilog can now use the free Paradigm Works SystemVerilog FrameWorks OVM Template Generator to reduce their development time and effort in delivering chips to market.

The OVM Template Generator enables verification engineers to specify a template for their SystemVerilog-based OVM project environments and create derivative environments on demand.

Verification teams are now able to ramp up their SystemVerilog-based OVM environments faster because the OVM Template Generator generates an OVM-compliant environment based on command line user inputs that specify which components are desired in the environment. With the tool relieving verification engineers from having to make many of the OVM implementation decisions, verification engineers are therefore liberated to apply more of their development efforts toward their application-specific code.

The tool’s auto-generated code is project-proven and high quality, as the OVM Template Generator’s predefined code templates are verified against the OVM compliance checklist provided by Mentor Graphics, co-developer of the OVM. The auto-generated environment improves code consistency and ease of reuse across projects. Development teams can leverage the tool’s templates to propagate coding guidelines and other project standards.

More information: Paradigm Works