Catapult-SpyGlass ESL-to-RTL Power Optimization Flow

Atrenta and Mentor Graphics teamed together on an high-level synthesis power optimization flow. The collaboration between the two companies has resulted in an interface between Mentor’s Catapult C Synthesis high-level synthesis tool and Atrenta’s SpyGlass-Power RTL power estimation and reduction tool to automate multi-level clock gating. The RTL output from Catapult is seamlessly handed off to SpyGlass-Power, which examines every clock gating candidate identified by Catapult, measures the potential power savings, and determines which particular candidates should be included or excluded from the clock gating insertion process. The static and dynamic power estimates from SpyGlass-Power are fed back into Catapult C for performance, area and power tradeoff analysis, and the resulting RTL netlist is then available to downstream RTL synthesis tools, resulting in a very efficient low-power design implementation.

More info: Atrenta