IMEC commented on their research in dielectrics and metallization technologies. IMEC has made progress in the metallization of 22nm interconnects, in Cu/low-k reliability assessment, and in the suppression of low-k integration damage. The results contribute to deliver the interconnect performance and reliability beyond the 32nm node. These results were a result of cooperation with Intel, Micron, Panasonic, Samsung, TSMC, Elpida, Hynix, Powerchip, Infineon, NXP, Qualcomm, Sony, and ST Microelectronics.
IMEC researchers have investigated RuTa metallization as a promising scheme for achieving good metallization of 22nm features. It could likely replace the traditional Ta physical vapor deposition (PVD), which, for decreasing feature sizes, looses its ability to achieve uniform Cu seed. Four different metallization schemes (i.e., TaN/Ta, RuTa, TaN + Co and MnOx) were evaluated in terms of Cu fill, electrical performance, and compatibility with chemical mechanical polishing (CMP) slurries.
Barrier and Dielectric Reliability Assessment
IMEC developed a model that for the first time describes the link between line edge roughness (LER) and time dependent dielectric breakdown (TDDB) lifetime. The model was validated on 50nm half pitch Cu damascene lines embedded into a k=2.5 low-k material, indicating that LER significantly contributes to the integrated dielectric reliability margin degradation. For older technology nodes, the reliability is mainly determined by dielectric deposition, patterning (lithography, etch/ash), barrier deposition, CMP and cap deposition, while for the 22nm and beyond the LER impact is expected to increase.
Plasma Induced Low-k Damage Reduction
IMEC proposes a non-contact dielectric constant metrology based on a near-field scanning probe microwave microscope to evaluate the dielectric properties after each processing step. The technique has been used to study the effect of plasma ash chemistry for removal of the photoresist mask and is shown to be a good method for non-invasive real-time in-line monitoring of patterned low-k structures at every step during interconnect integration. Plasma damage is the main cause of dielectric reliability loss in low-k materials during Cu/low-k integration. The introduction of porous low-k materials has increased the dielectrics sensitivity to plasma damage.
More info: IMEC