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Oasys Design Systems Chip Synthesis for 20M+ Gate Designs

Posted by Ken Cheung in EDA Tools on Tuesday, July 7, 2009

Oasys Design Systems launched Chip Synthesis. According to Oasys, Chip Synthesis reinvents of RTL synthesis for chips beyond 20-million gates. The Oasys Chip Synthesis technology can synthesize an entire design from RTL to placed gates in a single bite, and do it in a fraction of the time. The Oasys technology has been built from the ground up to overcome some of the very fundamental limitations of traditional RTL and physical synthesis tools. The new platform for RTL design can handle today’s most complex designs. The early consideration of physical information using Oasys’ Place First approach ensures the best quality of results and a convergent flow all the way through layout.

More info: Oasys Design Systems

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