CoWare unveiled the Interconnect and Memory Subsystem Performance Optimization design flow for CoWare Platform Architect. The new design flow enables early and efficient optimization of next-generation system-on-chip (SoC) architectures using ARM AMBA-based virtual platforms. CoWare Platform Architect tool and IP model enhancements and CoWare CoStart services are available immediately for use with the 2009.1.1 release.
CoWare virtual platforms for architecture design are the virtualized representation of an electronic system used for the purpose of system-level performance analysis and architecture optimization. The new flow provides system architects with the ability to efficiently capture the dynamic performance workloads of each application subsystem of a multi-function SoC in the form of transaction traffic, months before software is available and with minimum modeling effort using a well-defined, repeatable methodology.
The Interconnect and Memory Subsystem Performance Optimization design flow for CoWare Platform Architect is enabled by CoWare’s system-level design features:
- Trace- and task-driven generation of transaction traffic, enabling creation of performance workload models reflecting the application performance workloads of the multi-function use-cases for interconnect and memory subsystem analysis
- Integrated graphical environment for transaction tracing and statistical port analysis enabling platform model validation and system-level performance measurement of transaction count, transaction throughput, and transaction latency
- Support for simulation and analysis of multiple TLM protocols at mixed levels of abstraction, including TLM-2.0 and cycle-accurate AHB, APB, and AXI communication protocols, and user-defined data collection based on SCV transaction recording
- Scripting support for simulation sweeping of traffic scenarios and IP parameters across multiple simulations enabling design space exploration, sensitivity analysis using spreadsheets, and root cause analysis
- CoStart services for rapid end-user ramp-up with AXI-based designs
More info: CoWare