Sigasi launched the Public Beta Program for Sigasi HDT, which is an Intelligent Development Environment (IDE) for VHDL. The Sigasi HDT design platform for VHDL features an ultra-fast VHDL parser and compiler that run transparently in the background. The tool enables digital designers to make modifications faster and smarter. Sigasi HDT increases design productivity for both occasional and experienced VHDL designers, by helping them to write, inspect, and reuse their designs in an intuitive way.
More info: Sigasi HDT Public Beta Program