EDA Blog - electronic design automation, embedded systems, ic

Share/BookmarkSubscribe

SMIC 65-nanometer Low Leakage Process IP Portfolio

Posted by Ken Cheung in Foundry,IP Cores on Friday, May 15, 2009

Semiconductor Manufacturing International Corporation (SMIC) announced a set of 65-nanometer low leakage process IPs. SMIC’s new 65nm IPs includes a set of six memory compilers, which enable the intelligent and rapid generation of memory blocks in bulk and on the fly. The compilers feature memories optimized for very high performance and also optimized for performance and area. The silicon validation is undergoing. The 65nm IP portfolio can be used to design a wide range of consumer applications such as mobile phones, personal media players, GPS, DTV, set-top boxes, and mobile storage devices.

More info: Semiconductor Manufacturing International Corporation

Related Posts with Thumbnails

Custom Search

EDA Blog Newsletter
Don't have time to visit EDA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.