IMEC has transferred MemoryVAM (Memory Variability Aware Modeling) to Samsung Electronics. MemoryVAM is an EDA tool for statistical memory analysis. The tool predicts yield loss of SRAMs caused by the process variations of deep-submicron IC technologies. MemoryVAM also helps memory and system designers to estimate yield loss due to changes in cycle time, access time, and power consumption (static/dynamic) caused by process variations.
MemoryVAM is part of IMEC’s Variability Aware Modeling (VAM) flow which is a holistic flow capable of percolating process variations all the way from the process technology up to the System on a Chip (SoC) level. VAM helps track the reasons for yield loss and the relative likelihood of such failure. Unlike most of the statistical analysis techniques, VAM is unique in its kind by accurately keeping track of all statistical process, design and environmental correlations tightly linked together and across abstraction levels.
With MemoryVAM, the analysis of parameters of the memory can be directly embedded in the input netlist by the designer. These are then used to carry out the implementation of the method, without requiring additional custom modeling steps from the user. The key to this strategy is the ability to complement the analysis of a nominal memory model under test with statistically sampled variants of the devices. This is done by using an in-house developed statistically enhanced Monte Carlo technique, although it also allows the usage of any other available enhanced sampling technique. With this novel and fast analytical technique, statistical information on the critical path percolates to the complete SRAM organization level, resulting in a realistic prediction of the yield as perceived by the memory tester and/or equivalent BIST (built-in-self-testing) technique.