JESD209-2 LPDDR2 Low Power Memory Device Standard

JEDEC Solid State Technology Association published the JESD209-2 LPDDR2 Low Power Memory Device Standard. The new standard offers advanced power management features, a shared interface for nonvolatile memory (NVM) and volatile memory (SDRAM), and a range of densities and speeds. The standard will enhance the design of such products as smart phones, cell phones, PDAs, GPS units, handheld gaming consoles, and other mobile devices by enabling increased memory density, improved performance, smaller size, overall reduction in power consumption as well as a longer battery life.

  • Advanced Power Management
    The JEDEC LPDDR2 standard offers several power-saving features. LPDDR2 includes a reduced interface voltage of 1.2V. LPDDR2 also supports advanced mechanisms for managing power usage such as Partial Array Self Refresh and Per-Bank Refresh.

  • Shared Memory Interface
    A single JEDEC standard encompasses two distinct types of memory: NVM and SDRAM. The two memory types can share a common bus interface. LPDDR2 NVM and SDRAM devices can be stacked.

  • Fast, Scalable Performance
    Multiple device configurations are supported to meet the requirements of a wide array of mobile devices (100MHz – 533MHz operating frequency; x8, x16 and x32 data widths; 2 and 4-bit pre-fetch options; 1.8 and 1.2 volt core voltage options; and device densities of 64Mb-32Gb for NVM and 64Mb-8Gb for DRAM).

More info: JEDEC