Yield Explorer, from Synopsys, is a yield management product for speeding the discovery and mitigation of yield limiters in leading-edge integrated circuits. When compared with traditional methods, Yield Explorer can accelerate the first-silicon debug time by an order of magnitude. Establishing seamless connectivity between design, simulation, manufacturing and test domains, Yield Explorer enables superior return on investment (ROI) by minimizing design re-spin through rapid and comprehensive capture of design-process-test interactions causing low yield.
Yield Explorer Features
- Complex correlations across site-parametric, design, physical verification, simulation, product test and custom data sources
- Synchronized Component Architecture integrates all incoming data into a single, coherent analysis
- Charts and spreadsheets interact with wafer maps and failing net overlays onto design
- Dynamically extendable data model permits any number of custom data fields to be loaded into the Yield Explorer database
- Platform neutral Analysis Client (Windows, Linux, UNIX) allows all users to use the same application regardless of desktop computing environment
Yield Explorer offers several novel approaches to enable fast interactive analysis for yield engineers dealing with systematic yield limiters. The GUI is uniquely structured around a layout viewer for easy superposition of test failures on the corresponding layers of physical design. In addition to the wide range of analytical functions, users also benefit from the industry standard Tcl scripting environment built into the GUI. This environment can accommodate very large volumes of data with customer-specific data naming and content requirements. Its dynamically extendable data model provides a way of assimilating new types and formats of data without any loss of information or efficiency.
More info: Yield Explorer (pdf)