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DISPLAY-CTRL High Resolution Display Controller Core

Posted by Ken Cheung in IP Cores on Tuesday, March 10, 2009

DISPLAY-CTRL, from Evatronix, is a high resolution display controller IP core for PC, home video, mobile, and industrial applications. The controller supports all common display formats, from QVGA to WUXGA and Full HD resolutions. The DISPLAY-CTRL Controller is available for licensing now. The IP core is delivered as a Verilog source code with a set of scripts and macros for simulation/synthesis support. An optional reference design for a proprietary evaluation board facilitates application development.

The controller accepts RGB 24 or 15 bits per pixel input color formats and features a complete set of programmable horizontal and vertical timing parameters (such as front porch, back porch and sync intervals).

The core includes a native AMBA AHB bus master/slave interface and a programmable FIFO controller. Both depth and near-full level parameters for the FIFO are configurable, as is the endianess of the interface.

The DISPLAY-CTRL IP core is compliant with VESA and EIA/CEA standards (HD resolutions). When working in 1920×1200 resolution with 60 Hz refresh rate, the controller reaches the speed of 154 MHz. The following video DAC devices have been used for DISPLAY-CTRL hardware verification: Analog ADV7120 and AD9889B and Chrontel CH7301C. For HDMI connection, DISPLAY-CTRL’s external interface matches the ST7887 from Sitronix.

More info: Evatronix

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