IAR Embedded Workbench for ARM 5.30
IAR Systems introduced Version 5.30 of IAR Embedded Workbench for ARM. Version 5.30 featurees new debug capabilities for ARM Cortex-M3 processors that were previously only available in dedicated devices and costly debug probes. In addition, Version 5.30 supports source code compliance checking to the MISRA-C:2004 standard, for high integrity applications such as automotive as well as support for the ARM Cortex Microcontroller Software Interface Standard (CMSIS).
IAR Embedded Workbench for ARM v5.30
- New Cortex-M3 debug features
- Compiler size optimizations
- Compressed initializers
- MISRA C:2004 support
- ST ST-LINK debug probe
- ARM7EJ-S core support
- Support for the ARM7EJ-S core
- New device support
- Over 1400 example projects
Display and analysis of Cortex-M3 processor SWV/SWO data has been simplified. A statistical function profiler based on the Cortex-M3 processor PC sampler makes it easy to find hot spots and CPU intensive functions in an application, and a disassembly window, featuring an instruction trace count, gives simplified code coverage functionality. A new Data Log window logs accesses to up to four different memory locations or areas, and includes time information. In addition, an Interrupt Log window now logs entrances and exits to and from interrupts, including time information. A time scale for each interrupt source is displayed in a Graph window.
The compiler optimizer has been tuned to generate industry-leading code size for Cortex-M3 code. The linker can also now compress initialized data to minimize demands on Flash memory: the compressed data will be automatically uncompressed when moved from Flash to RAM by the startup code.
More information: IAR Embedded Workbench for ARM
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