Everything You Wanted to Know About SOC Memory – But Forgot to Ask

Tensilica, Inc. is offering a webinar titled, “Everything You Wanted to Know About SOC Memory – But Forgot to Ask.” The webcast discusses the many alternatives for on-chip and off-chip memory usage that SOC designers must understand to develop successful multicore SOCs. The webinar will also highlight the essentials of SOC memory organizations for multicore designs, on-chip SRAM and DRAM, local memories and caches, on-chip non-volatile memories, and memory controllers for off-chip memory. The 60-minute webcast will take place on Wednesday, January 28th at 11:00 a.m. PT / 2:00 p.m. ET.

Here’s the blurb from their web site:

Engineering is the fine art of balancing a complex matrix of requirements and resources to produce useful products. SOC design is no different. If you are a system architect, member of an SOC design team, or if you manage one, then memory is critically important to you.

On today’s multicore SOC designs, more on-chip silicon is devoted to memory than to anything else on the chip and yet memory is often added as an afterthought.

In addition, many embedded SOC designs require even more memory capacity than is available on chip so you must factor off-chip memory into the design equation as well. Appropriate off-chip memory interfaces thus become a key part of the overall system design.

This Web seminar discusses the many alternatives for on-chip and off-chip memory usage that SOC designers must understand to develop successful multicore SOCs. The seminar discusses the essentials of SOC memory organizations for multicore designs, on-chip SRAM and DRAM, local memories and caches, on-chip non-volatile memories, and memory controllers for off-chip memory.

Do you want to know the difference between 6T and 4T SRAM designs? What kind of SRAM gives your design resistance or immunity to single-event upsets? And just what is a 1T SRAM? What are the system design ramifications between NAND and NOR Flash ROM? How do DDR2 and DDR3 SDRAMS compare?

These questions and more will be covered in this Webinar created just for SOC designers and architects.

More info: Tensilica SOC Memory Webinar