BeSang 3D IC Technology

National NanoFab Center (NNFC), Stanford NanoFab (SNF), and BeSang Inc. recently developed three-dimensional (3D) integrated circuit (IC) technology. The 3D IC enables low-cost memories and high-performance logic products with large embedded memory blocks. The 3D IC has been processed on 8 inch wafers with industry standard 0.18 um CMOS technologies both at NNFC and SNF. The chip contains 128 million vertically oriented devices as a test vehicle. It is uniquely processed at low temperatures, below 400 degree Celsius. A submicron thick single crystalline silicon layer is initially formed above the silicon substrate with two metal interconnect layers, followed by vertical devices and additional metal layer.

Unlike conventional semiconductor technologies with planar devices on the surface of the semiconductor substrate and interconnects only above the planar devices, the emerging 3D IC technology forms full 3D interconnects below and above the vertical devices. This represents a significant breakthrough. One of unique features of BeSang’s 3D IC is the capability of unrestricted 3D interconnections using conventional via technologies that does not require wafer alignment nor through-silicon vias for 3D interconnects. Conventional CMOS technology is facing its scaling limits. Therefore, this emerging 3D IC technology will extend the lifespan of CMOS technology, because it is an excellent alternative way to accommodate more devices on a given wafer area.

Chip level 3D IC has been explored for many years by the semiconductor industry. However, market introduction of chip level 3D IC has been delayed due to technical challenges, including high-temperature processing, defects in semiconductor layers, limited 3D interconnections, and a complex process. For the first time in the industry, BeSang provides solutions to these problems and has successfully generated high-performance and reliable devices on single crystalline silicon layers that are subsequently formed above another silicon substrate at low temperature. The low-temperature, high performing process is an important aspect of this new technology.

BeSang’s 3D IC technology with vertical devices aims at an innovative, simpler, and more cost-effective way to enhance large functional blocks, such as memory arrays or photodiodes for image sensors, systems-on-a-chip, microprocessors, and memory control logic circuitry in advanced semiconductor chips.

More info: BeSang | Stanford Nanofabrication Facility