Verification Now Global Seminars
The Verification Now 2008 seminars will take place October 14 and through November 3. This year events will feature technical “how to” information that addresses key points of pain in today’s verification methodologies. The full-day technical seminar will provide design and verification engineers with information on why verification planning is needed, and how to effectively apply planning to existing design methodologies. The seminar also will look at the importance of layered stimulus generation techniques to build flexibility and reusability into a SystemVerilog testbench, and will outline how to implement those techniques.
Presentations
Requirements Based Verification
- Verification Processes
- Overview of common processes
- What can happen without processes
- Benefits of having processes
- Adopting RBV
- Discussion of common problems
- Process 1: Requirements Extraction
- Techniques for understanding a design
- Identifying potential faults and failures
- Types of failures, and sources of bugs
- “Brainstorming” – participants, organization, structure & deliverables
- Writing requirements
- Why detail is important
- Process 2: Requirements Prioritization
- Why do we need to prioritize?
- Factors that influence priority
- Techniques for determining influence values
- Techniques for determining priority
Building Flexible and Reusable Testbenches using a Layered Approach to Stimulus Generation
- What is Layered Stimulus Generation
- Advantages of Layered Stimulus Generation
- Typical components of a Layered Stimulus Generation solution
- Layered Stimulus Generation in the VMM and OVM
- Randomization and Layered Stimulus Generation
Seminars Locations and Dates
- Santa Clara, California – Tuesday, October 14, 2008
- Austin, Texas – Tuesday, October 21, 2008
- Yokohama City, Japan – Monday, October 27, 2008
- Taipei, Taiwan – Friday, October 31, 2008
- Herzliya, Israel – on Monday, November 3, 2008
More info: Verification Now
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