XJTAG Boundary Scan Workshops
XJTAG announced a series of free ‘introduction to boundary scan’ training workshops at its Cambridge headquarters. The full-day sessions will run throughout the autumn and winter and are designed to provide design, development, test, and production engineers with a practical hands-on introduction to boundary scan. XJTAG’s trainers will explain how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits.
The free workshops will give an overview of the IEEE 1149.x standard, demonstrate how to communicate with the JTAG chain and interact with JTAG devices, such as FPGAs. They will provide an introduction to board testing using the JTAG chain, explain how to describe a circuit to enable JTAG testing and how to run an infrastructure connection test. Finally, the trainers will outline how to test non-JTAG elements of a board design using boundary scan.
Dates
- October 21, 2008
- October 22, 2008
- October 23, 2008
More info: XJTAG Autumn Workshops
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