Scalable Multichannel DRAM Subsystems for Video SoC Webinar
Sonics Inc. announced a webinar on how a multichannel DRAM subsystem can provide a scalable and memory efficient solution for the next generation of video SoCs. The webinar will provide information that will be valuable to architects and SoC design engineers. The webinar is scheduled for October 2 at 10 am PST. There is no cost to participate.
Video SoCs Webinar Topics
- Digital video architecture requirements
- DRAM efficiency issues when moving to DDR3
- Multichannel DRAM architectures
- A solution to minimize the impact on software, when implementing a complex physical memory architecture
Sophisticated image and scaling algorithms for high-definition-video along with state-of-the-art compression standards such as H.264 are constantly pushing the limits of the memory subsystems with higher performance requirements. The webcast will provide valuable information on addressing these issues with multichannel DRAM subsystems and how they can provide a scalable and memory efficient solution for the next generation of Video SoCs.
More info: Using Multichannel DRAM Subsystems to Create Scalable Architectures for Video SoCs
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