Cadence Design Systems, Inc. (NASDAQ: CDNS) recently developed simulation technology to address the challenges of verifying wireless integrated circuits implemented in advanced CMOS process nodes. Cadence has added the “turbo” technology it recently brought to the Virtuoso Spectre Circuit Simulator to its RF analysis. The result is performance improvements of two to five times for analysis and verification of large RF circuits targeting advanced CMOS process nodes, and with no degradation in accuracy.
The technology complements a complete manufacturability-aware solution from Cadence for design, implementation and verification of RF integrated circuits (RFICs). Based on the Virtuoso custom design platform, the solution enables designers to deal with the challenge of integrating RF with analog/mixed-signal baseband, and the emerging need for RFIC-focused electromagnetic analysis. It improves time to market and overall design costs through faster and more accurate verification that reduces design turnaround time and expensive silicon respins.
The complete solution includes the Cadence Virtuoso RF Designer, which brings a full-wave fast planar electromagnetic (EM) field solver to the RF/wireless designer’s desktop. Virtuoso RF Designer offers designers advanced verification capabilities for faster electromagnetic analysis of complex structures and geometries — all within a single design flow, accelerating chip finishing and verification. Virtuoso RF Designer integrates seamlessly into the Virtuoso front-end and leverages Cadence’s patented electromagnetic analysis technology to accelerate and accommodate large designs found in today’s RFICs and System-on-Chip (SoC).
More information: Cadence