Aldec is holding a webinar titled, HW/SW Co-Verfication for Embedded Designs. The webcast will take place on Thursday, September 11 at 3:00 PM Central European Summer Time (CEST).
The online event will be presented by Jaroslaw Kaczynski, Technical Marketing Engineer at Aldec.
- The processor and portions of the design in acceleration board running at MHz speed
- Maintaining entire system visibility of both software and hardware elements
- Utilizing a direct software debugging connection
- AHB peripherals co-simulation
- Making instant software and hardware corrections
Are you thinking of developing a complex SOC with a processor such as ARM, Microblaze, NIOS II, Actel CoreMP7? Minimizing time-to-delivery requires hardware and software design teams to come together much earlier in the design cycle. They need a connection to a real hardware processor, memory, and accelerated simulation for surrounding peripherals, in a more efficient environment for system-level verification. We will present a real processor-based co-verification solution that enables early hardware and software co-design and verification in an accelerated environment.
More info: HW/SW Co-Verfication for Embedded Designs