JasperGold Verification System and JasperGold Express 5.0

Jasper Design Automation recently released JasperGold Verification System and JasperGold Express version 5.0. The latest formal verification solutions deliver three times (3X) greater proof capacity for superior formal verification performance enabled by two times (2X) the reduction in memory requirement, ten times (10X) faster core engines and powerful patented formal technology. Featuring new core engines, JasperGold v5.0 delivers dramatic improvements in both interactivity and tunneling performance. JasperGold Verification System and JasperGold Express v5.0 are currently available.

JasperGold can validate complex design behaviors that include FIFOs, memories, caches and multiple clock domains. Aimed at system architects, logic designers, verification engineers and silicon bring-up teams designing complex system chips, JasperGold v5.0 can be used to successfully prove protocols and executable specs; to design, explore and debug RTL; to ensure correctness of block-level functionality; and to conduct fast silicon validation and debug.

JasperGold v5.0 also delivers improved interactivity that shortens debug time. With on-the-fly addition of constraints and the ability to rapidly generate new waveforms, JasperGold v5.0 delivers a superior debugging experience. The improved tunneling performance allows automatic analysis of the state space as well as interactive analysis by the user. And, with Solaris10 64-bit support, JasperGold now completes its full support for both 32-bit and 64-bit platforms, including Linux.

More info: Jasper Design Automation