Practical Examples of PSL Usage

Aldec will be presenting a seminar at 11am (Pacific Daylight Time) on Thursday, July 17, 2008. Previous presentation in this thread (“Understanding Assertions – The Key to Efficient Usage”) provided solid theoretical background for PSL usage in hardware design and verification. Using this background, current presentation shows how to use PSL in real life designs to make verification more efficient.


  • Clocking PSL properties
  • Popular property patterns
  • Properties in assertions and functional coverage
  • PSL examples for typical design units
  • Common coding mistakes
  • Methods of binding verification units to design units
  • PSL embedded in the HDL code vs. saved in separate files

More info: Advanced Verification Methodology Seminars