Avnet Memec Actel Ultra Low Power Workshops

Posted by Ken Cheung in Events, Training, FPGAs on Tuesday, July 1, 2008
Silicon Image 12MP Camera Processor IP Core »
« Calypto PowerPro CG 2.0 for RTL Power Optimization

Avnet Memec recently announced their Actel Ultra-Low Power SpeedWay Design Workshop. The "how to" workshops provide hands-on experience to designers interested in leveraging Actel's 5-microwatt IGLOO field-programmable gate arrays (FPGAs) for battery-operated and portable applications. Developed by Avnet's factory-certified field application engineers (FAEs), the $49 Actel Ultra-Low Power workshops will be available through August 26, 2008, in 36 locations throughout North America.All participants will receive Actel's battery-powered IGLOO Icicle Kit and a 7-segment digital multi-meter – a $100 value.

Agenda

  • Introduction to Libero IDE v8.3
  • IGLOO/A3P Product and Architecture Overview
  • FPGA Fabric Features - clocking, routing, memory
  • Low Power Design Considerations
  • Low Power optimization and analysis tools
  • Board level considerations
  • Processor and IP Overview

Avnet's Actel Ultra-Low Power SpeedWay is a full-day session that introduces customers to the Actel IGLOO family and the Actel Libero Integrated Design Environment (IDE). Hands-on labs using the 1.4" x 3.6" cell phone-sized Actel Icicle Kit allow designers to easily and rapidly program, evaluate and modify their low-power IGLOO-based portable designs.

Location and Date

  • Irvine, CA: 7/08/2008
  • Indianapolis, IN: 7/10/2008
  • San Diego, CA: 7/10/2008
  • Rochester, NY: 7/15/2008
  • Cleveland, OH: 7/15/2008
  • Phoenix, AZ: 7/15/2008
  • Syracuse, NY: 7/17/2008
  • Detroit, MI: 7/17/2008
  • Baltimore, MD: 7/23/2008
  • Dallas, TX: 7/23/2008
  • Tampa, FL: 7/29/2008
  • Vancouver, BC: 7/29/2008
  • Houston, TX: 7/29/2008
  • Orlando, FL: 7/31/2008
  • Austin, TX: 7/31/2008
  • Atlanta, GA: 8/05/2008
  • Montreal, QC: 8/12/2008
  • Kansas City, KS: 8/12/2008
  • Ottawa, ON: 8/19/2008
  • St. Louis, MO: 8/19/2008
  • Toronto, ON: 8/26/2008

All Locations: 8:30AM - 3:30PM (breakfast, lunch included)

More information: Actel SpeedWay Design Workshop

If you found this page useful, bookmark and share it on:

Silicon Image 12MP Camera Processor IP Core »
« Calypto PowerPro CG 2.0 for RTL Power Optimization

Possibly of Interest

 
EDA Blog Newsletter
Don't have time to visit EDA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:   

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.