IMEC Variability Aware Modeling Flow for Sub-45nm

IMEC recently announced a variability-aware modeling (VAM) flow that analyzes process variability of sub-45nm technologies which enables designers to optimize their system design for timing, energy and yield versus expected application load. The flow assesses the impact of process variations and degradation effects of sub-45nm technologies on the system performance by giving valuable information to the designer. IMEC’s VAM flow can hook into commercial design for manufacturing (DFM) tools and has been validated on industrial process technology data and IP cores.

IMEC developed the VAM flow for percolating information on process variability of sub-45nm technology from the transistor up to the system level. VAM enables IP block and system designers to make predictive assessment of architecture design options and to identify design bottlenecks before manufacturing. As a result, functional problems and parametric uncertainty of their designs caused by process and material variability of deep sub-micron technologies can be overcome.

IMEC validated the VAM flow by propagating commercial TSMC 45nm variability data to estimate performance and energy for an ARM926 processor. The VAM output was used to optimize the processor before manufacturing using a commercial tool flow.

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