EDA News – 2008.06.04

GreenSocs Announces DAC Transaction-level Modeling Tutorial
GreenSocs[tm] Ltd announced it will host a technical tutorial during the Design Automation Conference 2008 in Anaheim CA. The tutorial is titled, Writing Efficient TLM 2.0 Models with GreenSocs.

EVE to Break the Billion Cycle Barrier with ZeBu at DAC
Design Automation Conference (DAC) attendees who stop by the EVE booth (#301) during the conference will learn how to “break the billion-cycle barrier” with ZeBu, EVE’s system-on-chip (SoC) hardware and embedded software co-verification solutions.

Extreme DA Adds MXO Capability to GoldTime Timing Analyzer
Extreme DA[tm] announced the addition of multi-dimensional optimization (MXO[tm]) capability to its GoldTime[tm] timing analyzer. GoldTime MXO provides the fastest way to analyze complex digital SOC designs with the smallest number of computer resources.

CAST, SoC Solutions Build FPGA System with Synopsys ReadyIP Flow
CAST, Inc. and technical partner SoC Solutions LLC recently proved the effectiveness of a new FPGA design capability from Synopsys’ Synplicity Business Group by developing a complete 32-bit processor-based system in just three and a half days.

Synopsys Supports TSMC Reference Flow 9.0
Synopsys, Inc. (NASDAQ: SNPS) announced that it is delivering comprehensive support for TSMC Reference Flow 9.0 targeting 40-nanometer (nm) processes, including 40G and 40LP. The two companies also extended the scope of their library distribution agreement.

Tensilica, SPIRIT DSP Team on Mobile Multimedia Audio, Voice for Xtensa
SPIRIT DSP and Tensilica,® Inc. announced that they have formed a strategic partnership and can now deliver 18 optimized, high quality digital audio and voice software packages that run on Tensilica’s HiFi 2 Audio Engine, an increasingly popular audio architecture for system-on-chip (SOC) designs.

CoWare, Doulos Team on ARM System Design Training
Doulos and CoWare® Inc announced they will broaden the scope of their successful collaboration on SystemC and transaction-level modeling (TLM) education to encompass the market-leading Doulos ARM training capability.

4DSP Introduces FM577 FPGA High Density Platform
Low power consumption without compromising performance is promised by the FM577 FPGA platform introduced by 4DSP. The innovative design company has created the new PMC based on a dual ALTERA® Cyclone III FPGA devices architecture. This maximizes performance while keeping costs low.

Renesas Unveils E100 Emulator for 8- to 32-Bit CISC Embedded Systems
Renesas Technology America, Inc. announced the E100 full-spec emulator, an expansion of its extensive line of development tools for engineers designing embedded systems that use microcontrollers (MCUs). The E100 improves the system design process.

Aptina Imaging Accelerates JPEG Performance with Scalado SpeedTags
Aptina Imaging announced that it will integrate Scalado SpeedTags(TM) technology into future mobile 3 MP and above multi-megapixel SOC designs. Scalado’s technology will be included in Aptina’s SOC sensors and assists in managing the larger files produced by the high resolution image sensor.

Toshiba, Sarnoff Expand License Agreement for TakeCharge ESD Protection
Sarnoff Europe announced its expanded license partnership with Toshiba Corporation in Sarnoff’s TakeCharge® electrostatic discharge (ESD) solution. Sarnoff has developed ESD protection solutions for five consecutive generations, ranging from 180 nanometers (nm) to 45nm, of Toshiba CMOS process technologies.

Pachira IP to Represent Innurvation for Semiconductor Patent Licensing
Pachira IP and Innurvation, Inc. have reached an agreement granting Pachira the exclusive right to license the semiconductor patents owned by Innurvation.