DATE 2008 Conference

Posted by Ken Cheung in Events, Training on Wednesday, February 13, 2008

The DATE '08 Conference will take place March 10-14, 2008. The event offers five days of high quality scientific papers from academic and industrial research for the design and test of Systems-on-Chip and FPGA, through to Electronic Systems Hardware and Embedded Software. Early registration discounts for the DATE Conference expire on February 20th 2008.

DATE'08 Executive Management Sessions

  • Unifying or Overrated: A System Level Design Strategy
    Significant momentum is building around ESL (Electronic System Level) design, but is the concept living up to much hyped expectations? Is there even a common definition for ESL?
  • From IDM to "Fab-Lite": What Changes in your EDA Strategy?
    Addressing the coming challenges in EDA as companies change from quite "vertically integrated" IC manufacturers to a strategy of reliance on significant more sharing of semiconductor process development.
  • The Perils of 45nm: A Report on the Move
    An informal "progress report" on the ongoing technology move to designs at 45 nm - Contrasted to the predictions of only a few years ago, how is the move really going? Issues were raised about the need for new design techniques, such as the use of statistical methods and increased manufacturing concerns in order to achieve yields.

Technical Panel Session

  • Caution Ahead: The Road to Design and Manufacturing at 32nm and 22nm
    At 32 and 22 nm, which manufacturing technology changes will be so revolutionary as to cause upheavals in the semiconductor supply chain and on design practices? How will designers "sign off" on a design at 32 nm?

Hot Topic Sessions

  • Quantitative Evaluation for Embedded Systems Design
  • Test Challenges for Low Power Devices
  • Quantitative Productivity Measurement in IC Design
  • Analogue: How to Survive in the Era of Nano CMOS
  • 3D Integration or How to Scale in the 21st Century

Embedded Tutorials

  • Software for Wireless Networked Embedded Systems
  • ARTEMIS and ENIAC Joint Undertakings: A new approach to conduct research in Europe

Industrial Sessions

  • Industrial System Designs in Transportation and Information Technologies
    • Tailored solutions for safety-installations in a project for trans-European rail traffic
    • On the verification of high-order constraint Compliance in IC-design
    • Industrial IP integration flows based on IP-xact standards
  • System Designs in Information Technologies
    • Concurrent design and handover of SoC subsystems for enhanced reuse and flow automation
    • Cooperative safety: combination of multiple technologies
    • System performance optimization methodology for Infineon 32-bit automotive microcontroller

More info: DATE 08 Conference

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