Altera Zero-Power MAX IIZ CPLDs
Altera Corporation (NASDAQ: ALTR) created the zero-power MAX® IIZ CPLD to address the power, package and price constraints of the portable applications market. Offering a resource advantage of up to six times the density and three times the I/Os compared to competing traditional macrocell-based CPLDs, MAX IIZ devices allow designers to meet changing functional requirements at the same or lower power while saving board space. MAX IIZ devices deliver the many benefits of CPLDs—including flexibility, faster time to market, and board-level integration—to handsets and other portable applications. Altera optimized MAX IIZ devices to offer the best combination of zero power, small package,and low cost.
Microchip 8-bit Flash Microcontrollers
Microchip Technology Inc. (NASDAQ: MCHP) recently announced 12 new high-performance, 8-bit Flash microcontrollers (MCUs). The PIC18F8723 high-memory, general-purpose family offers a rich peripheral set and performance of up to 10 MIPS. The PIC18F4553 family adds an integrated full-speed USB transceiver and 12 MIPS performance. Finally, the PIC18F8493 LCD microcontroller family offers integrated LCD drive capability for low-power display applications.
Actel LCD Control Solutions
Actel Corporation announced solutions for liquid crystal display (LCD) control applications. The new IGLOO Video Demo Board, LCD adaptor boards with LCD panels, the IGLOO Video Demo Kit (IVDK), and display-related reference blocks use the 5 microwatt (µW) IGLOO field-programmable gate arrays (FPGAs). The new offerings will be attractive to the power-sensitive designers of portable and handheld consumer, industrial, medical, automotive, and military devices that utilize small-to-medium LCD displays.
ToneCore DSP Developer Kit
The ToneCore DSP Developer Kit is a solution for digital signal processor (DSP) software developers who create custom sounds for guitarists. The kit enables third-party audio DSP developers with little or no electronic design experience to quickly and easily program audio effects modules for Line 6 ToneCore guitar pedals. Now with the Line 6 ToneCore DSP Developer Kit, all audio designers who write DSP code can create and sell a portable, affordable, battery-powered, stereo audio hardware product for musicians and audio enthusiasts. All it takes is a PC and the kit.
Lattice LatticeSC/M Supports Quad Data Rate
Lattice Semiconductor Corporation (NASDAQ: LSCC) announced FPGA-based support for Quad Data Rate (QDR) II/II+ memory devices. The LatticeSC(TM) and LatticeSCM(TM) FPGA families (LatticeSC/M) now support QDRII/II+ rates up to 750Mbps. The high-speed QDR II and QDR II+ memory controller IP (intellectual property) is implemented in Lattice’s low power Masked Array for Cost Optimization (MACO(TM)) structured ASIC technology.
Cimetrix EDAConnect Interface A Library
EDAConnect, from Cimetrix Incorporated (OTC: CMXX), is a client-side software library designed to assist integrated device manufacturers (IDMs) and third party software providers in creating applications that can utilize the rich data available via the new Interface A connectivity standards commonly known as Equipment Data Acquisition (EDA).
OneSpin Stand-Alone 360 EC-FPGA Equivalence Checker
OneSpin Solutions’ 360 EC-FPGA equivalence checker is now a stand-alone tool. Previously, 360 EC-FPGA was an extension of OneSpin’s 360 EC-ASIC equivalence checker. The stand-alone 360 EC-FPGA equivalence checker is the first sequential equivalence checking solution dedicated to and priced for the FPGA market. 360 EC-FPGA is the only equivalence checker to support all sequential optimizations performed by FPGA synthesis tools. The tool helps designers verify functionality without disabling the advanced synthesis optimizations vital to achieving functional, performance and cost goals.
Renesas SH-MobileL3V2, SH-MobileUL Application Processors
Renesas Technology recently announced two new application processors: SH-MobileL3V2 and SH-MobileUL. The SH-MobileL3V2 offers additional video formats, high-resolution video capture and enhanced functionality to control image quality. The small-package SH-MobileUL provides excellent cost performance and is suitable for use in popular mainstream mobile phone models. The new processors will accelerate the proliferation of advanced multimedia capture and playback on mobile phones and portable media players, enabling both advanced systems that offer higher image quality, as well as lower-priced systems that offer TV and other multimedia features.
Tensilica TRAX-PC Processor Trace
Tensilica®, Inc. added an optional full-speed, non-intrusive instruction trace capability to its configurable processor cores. Tensilica’s TRAX-PC processor trace capture macrocell is Nexus 5001 compatible and ideal for debugging complex, challenging real-time applications such as engine and motor control. Software control and use of the on-chip TRAX hardware is fully integrated into Tensilica’s Xplorer(TM) integrated design environment (IDE) so software engineers can easily develop and debug programs while using the TRAX-PC trace macrocell.
NEC NaviEngine1 LSI for Car Navigation Systems
NaviEngine®1, from NEC Electronics, is a single-chip system LSI solution optimized for car navigation systems. Based on four high-speed CPU cores using the ARM® MPCore(TM) technology with symmetric multi-processing (SMP), NaviEngine1 is capable of simultaneously processing multiple streams of information needed for car navigation systems, including vehicle location, driving directions, and navigation functions. The chip delivers high-speed parallel processing performance of up to 1920MIPS at 400 MHz. In addition, NaviEngine1 has impressive 2D and 3D graphics using the POWERVR SGX 535 graphics core by Imagination Technologies, and is the world’s first system LSI chip with built-in Serial ATA functions.
Precision Synthesis, Xilinx SmartGuide Combo
Precision® Synthesis, from Mentor Graphics Corporation (NASDAQ: MENT), combined with Xilinx® SmartGuide(TM) technology, reduces design time. Test results conducted jointly over the past year using Mentor’s Precision Synthesis tool and the Xilinx SmartGuide functionality show that users saved an average of 40% in mapping and place-and-route (P&R) time. The combined solution preserves unchanged portions of the design when making small changes, reducing overall design iteration time. Tests performed at Xilinx show that over 97% of the components went unchanged and quality of results (QoR) was maintained in the process. These results have also been verified by mutual customers.
Microwave Office 2007 Design Software Simulation Library
Applied Wave Research, Inc. (AWR®) recently released Microwave Office® 2007 design software simulation library. Microwave Office features NXP Semiconductor’s sixth-generation laterally-diffused metal oxide semiconductor (LDMOS) devices. The simulation library provides power amplifier (PA) and base station design engineers, as well as designers of worldwide interoperability for microwave access (WiMAX) and wireless broadcasting equipment with AWR- and NXP-proven large signal circuit simulation models.
VPN Firewall Upgrade System Patent
O2Micro® International Limited (NASDAQ:OIIM) (SEHK:0457) was issued 17 claims under Great Britain (GB) patent number 2,425,627 for its Field Programmable Gate Array (FPGA) IC upgrade system in VPN Firewall solutions.
Jasper GamePlan Verification Planner 1.2
Jasper Design Automation recently released GamePlan(TM) Verification Planner version 1.2. GamePlan is a powerful tool for generating and tracking verification plans. In version 1.2, GamePlan now includes the ability to import verification results. After an easy set-up that takes no more than a couple of hours, verification teams can begin reading verification results back into their test plan to efficiently track their verification progress. In addition, GamePlan also delivers improved search capabilities, active hyperlinks in analysis views for easy organization, and a new Undo/Redo feature for improved usability.
Altera Stratix III FPGA Features 1067 Mbps DDR3 Speed
Altera Corporation (NASDAQ: ALTR) Stratix® III FPGAs has achieved DDR3 memory interface speeds in excess of 1067 Mbps. The result is a 33% advantage in memory performance over competing FPGA solutions. The higher memory bandwidth enables new communications, computing, and video processing applications that were either previously impossible or required doubling the number of memory banks. Altera’s Stratix III FPGA family is the industry’s only FPGA to demonstrate full compliance to the JESD79-3 JEDEC DDR3 SDRAM standard, including the performance-critical read/write-leveling specification for maximum system performance.