News – 2007.10.23 – Early Edition

SMIC Offers CPF Digital Reference Flow, Joins Power Forward Initiative
Semiconductor Manufacturing International Corporation (SMIC) (NYSE: SMI; SEHK: 0981.HK), the largest semiconductor foundry in China, and Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, announced that SMIC is offering a Common Power Format (CPF)-based 90-nanometer low-power digital reference flow and CPF-compliant libraries. SMIC also announced that it has joined the Power Forward Initiative (PFI).

NXP Selects Cadence Design Systems as Primary EDA Supplier
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, and NXP Semiconductors, the independent company founded by Philips, announced that they have signed a multi-year strategic agreement that positions Cadence® as NXP’s primary electronic-design-automation (EDA) solutions partner.

G2 Microsystems Develops Tracking Device with Cadence Low-Power Solution
Cadence Design Systems, Inc. (NASDAQ: CDNS), the leader in global electronic-design innovation, announced that G2 Microsystems has developed innovative wireless mobile tracking devices using the Cadence® Low-Power Solution. This complete, integrated and easy-to-use flow, based on the Si2 standard Common Power Format (CPF), enabled G2 Microsystems to achieve faster time-to-market and ultra low-power objectives.

Jasper Wireless, Telit Wireless Team on Machine Connections, Control
Expanding the reach of the next generation of machine connections and control, Jasper Wireless, a licensed global machine-to-machine (M2M) mobile operator, and Telit Wireless Solutions, a leading machine-to-machine (m2m) communications device manufacturer, announced a partnership agreement.

Frost & Sullivan Sees Big Potential with Smart Fabrics
New analysis from Frost & Sullivan, Advances in High Tech Polymer Fibers and Smart Fabrics, finds that on-going developments in the field of smart fabrics hold out tremendous potential for the concept, promising their use in the likes of healthcare applications (remotely monitoring health parameters), security (detecting danger and calling for help), and display of helpful data (communication through Internet or communication between people).

AMI Creates AMIS-49200 Process Automation Transceiver Reference Design
AMI Semiconductor (NASDAQ:AMIS), a leading designer and manufacturer of state-of-the-art mixed-signal and digital products for the automotive, medical, industrial and military/aerospace markets, announced a reference design and evaluation kit for the AMIS-49200. The AMIS-49200 Media Attachment Unit (MAU) is part of the AMIS line of processing automation transceivers for use in safety critical applications such as oil refineries, chemical processing and water treatment plants.

Synopsys Unveils TetraMAX Small Delay Defect Automatic Test Generator
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, announced availability of its TetraMAX® small delay defect automatic test pattern generator (ATPG) for use by design organizations worldwide to significantly improve the quality of manufacturing tests. Customers have validated the new test capability on manufactured designs, identifying problems in some devices that had previously passed standard at-speed tests. Small delay defect ATPG creates patterns to test the smallest defects inside integrated circuits (ICs) that could lead to failures when the devices are operated at full speed. Targeting these subtle delay-related defects using timing-aware pattern generation can improve the quality of test compared with existing ATPG technologies. Synopsys will demonstrate the new test feature as part of its power-aware design flow at this year’s International Test Conference (ITC) in Santa Clara, Calif., October 23-25 (Booth #212).

Synopsys Improves Low Power Management in Galaxy Test Solution
Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, announced it has extended low power management capabilities in the Synopsys Galaxy(TM) test solution to significantly reduce the time and effort needed to generate high-quality, power-aware manufacturing tests for integrated circuits (ICs). The TetraMAX® automatic test pattern generation (ATPG) solution now creates tests reflecting designers’ power budgets, and the DFT MAX scan compression product further automates integration of design-for-test (DFT) structures in designs that deploy advanced low power management techniques.

Agilent, Sequans Team on Wave 2 Mobile WiMAX Protocol Test
Agilent Technologies Inc. (NYSE: A) and Sequans Communications announced they would be extending their WiMAX(TM) collaboration to include Wave 2 Mobile WiMAX mobile station (MS) and base station (BS) protocol testing. Protocol Conformance Test (PCT) is a vital part of the WiMAX certification process. The availability of rigorous and efficient protocol test solutions is a must for ensuring that the latest WiMAX technologies are delivered with a high degree of device interoperability. This level of assurance helps to create customer confidence and drive market growth.

Rockfish Technology Rolls Out Interlaken Verification IP
Rockfish Technology announced the release of its second generation Verification IP with the addition of the Interlaken Bus Functional Model (BFM). Interlaken is a new high speed chip-to-chip interconnect protocol developed jointly by Cisco Systems and Cortina Systems.

DeFacTo Eliminates Gate-level Scan with HiDFT-Scan Design for Test
DeFacTo Technologies announced a new design for test (DFT) product that analyzes register-transfer level (RTL) integrated circuit and system-on-chip designs, creates appropriate RTL scan test structures, and inserts them into the RTL design. The new product, HiDFT-Scan, works within existing design flows and with industry-standard synthesis tools. Because it eliminates the need for gate-level scan, the new product has enabled chip designers to create the industry’s first high-level DFT sign-off methodology.

Electronics.ca Publishes Report on Physical Vapor Deposition
ELECTRONICS.CA PUBLICATIONS, the electronics industry market research and knowledge network, announces the availability of a new report entitled “Physical Vapor Deposition (PVD): Global Markets.” The physical vapor deposition (PVD) market has continued to expand over the past several decades. More sophisticated manufacturing and fabrication techniques and smaller size products have broadened the demand for vapor deposited materials. A variety of new and existing products require properties that best can be delivered by vacuum deposition of films on an expanding variety of substrates.

ELPIDA, UMC Create Development Program for Copper LOW-K DRAM, PRAM
Elpida (TOKYO:6665), a leading global manufacturer of DRAM chips, and UMC, (NYSE:UMC)(TSE:2303) a leading global semiconductor foundry, announced a joint development program for advanced DRAM with copper low-k backend, as well as for phase-change random access memory (PRAM). Elpida and UMC’s cooperation targets the development of advanced DRAM by joining Elpida’s technology excellence with UMC’s advanced copper low-k processes and technology development expertise. With the success of this collaboration, UMC will license Elpida under UMC’s copper low-k technology for Elpida’s production and Elpida will license UMC to offer DRAM as part of UMC’s advanced System-on-Chip (“SoC”) solutions. In addition, under the terms of their arrangement, Elpida and UMC will cooperate to develop P-RAM technology, coupling Elpida’s expertise in GST materials with UMC’s expertise in high performance CMOS logic technologies.